Uni20
Asynchronous tensor and runtime library.
Loading...
Searching...
No Matches
Tensor-Network Documentation

This directory combines current tensor-network design constraints, the pure-Uni20 finite BlockTensor DMRG path, and retained findings from the historical tensorcontraction-integration branch. Host and single-device resident-CUDA U(1) sweeps now use the current Tensor, symmetry, dispatch, Async, and CUDA architecture. The reference branch remains useful for MPI and later distributed-execution targets rather than defining current capability.

Current Main-Branch Foundations

TensorContraction Integration Reference

The MPI R/A/B/C fixture executors remain runnable only on the integration branch. Pure Uni20 now implements validated finite MPS/MPO owners, directional environment caches, a sparse R/A/B/C compiler and dispatched host/CUDA executor, matrix-free local Krylov solves, selected block-SVD pair replacement, directional two-site traversal, alternating terminal-energy convergence, and resident single-device CUDA storage throughout the working state. The remaining program includes post-truncation measurements, general initial-state canonicalization, broader models and symmetries, multi-GPU placement, MPI distribution, and continued performance work without retaining the external TensorContraction code lineage. The integration branch's measured behavior continues to supply design constraints and regression targets.

Relevant current source foundations are the dense Tensor layer, symmetry metadata, and low-level tensor kernels. Current physical-model construction lives in the model layer.